ESPHome 2026.2.4
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cc1101.cpp
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1#include "cc1101.h"
2#include "cc1101pa.h"
4#include "esphome/core/log.h"
5#include <cmath>
6
7namespace esphome::cc1101 {
8
9static const char *const TAG = "cc1101";
10
11static void split_float(float value, int mbits, uint8_t &e, uint32_t &m) {
12 int e_tmp;
13 float m_tmp = std::frexp(value, &e_tmp);
14 if (e_tmp <= mbits) {
15 e = 0;
16 m = 0;
17 return;
18 }
19 e = static_cast<uint8_t>(e_tmp - mbits - 1);
20 m = static_cast<uint32_t>(((m_tmp * 2 - 1) * (1 << (mbits + 1))) + 1) >> 1;
21 if (m == (1UL << mbits)) {
22 e = e + 1;
23 m = 0;
24 }
25}
26
28 // Datasheet defaults
29 memset(&this->state_, 0, sizeof(this->state_));
30 this->state_.GDO2_CFG = 0x0D; // Serial Data (for RX on GDO2)
31 this->state_.GDO1_CFG = 0x2E;
32 this->state_.GDO0_CFG = 0x0D; // Serial Data (for RX on GDO0 / TX Input)
33 this->state_.FIFO_THR = 7;
34 this->state_.SYNC1 = 0xD3;
35 this->state_.SYNC0 = 0x91;
36 this->state_.PKTLEN = 0xFF;
37 this->state_.APPEND_STATUS = 1;
38 this->state_.LENGTH_CONFIG = 1;
39 this->state_.CRC_EN = 1;
40 this->state_.WHITE_DATA = 1;
41 this->state_.FREQ_IF = 0x0F;
42 this->state_.FREQ2 = 0x1E;
43 this->state_.FREQ1 = 0xC4;
44 this->state_.FREQ0 = 0xEC;
45 this->state_.DRATE_E = 0x0C;
46 this->state_.CHANBW_E = 0x02;
47 this->state_.DRATE_M = 0x22;
48 this->state_.SYNC_MODE = 2;
49 this->state_.CHANSPC_E = 2;
50 this->state_.NUM_PREAMBLE = 2;
51 this->state_.CHANSPC_M = 0xF8;
52 this->state_.DEVIATION_M = 7;
53 this->state_.DEVIATION_E = 4;
54 this->state_.RX_TIME = 7;
55 this->state_.CCA_MODE = 3;
56 this->state_.PO_TIMEOUT = 1;
57 this->state_.FOC_LIMIT = 2;
58 this->state_.FOC_POST_K = 1;
59 this->state_.FOC_PRE_K = 2;
60 this->state_.FOC_BS_CS_GATE = 1;
61 this->state_.BS_POST_KP = 1;
62 this->state_.BS_POST_KI = 1;
63 this->state_.BS_PRE_KP = 2;
64 this->state_.BS_PRE_KI = 1;
65 this->state_.MAGN_TARGET = 3;
66 this->state_.AGC_LNA_PRIORITY = 1;
67 this->state_.FILTER_LENGTH = 1;
68 this->state_.WAIT_TIME = 1;
69 this->state_.HYST_LEVEL = 2;
70 this->state_.WOREVT1 = 0x87;
71 this->state_.WOREVT0 = 0x6B;
72 this->state_.RC_CAL = 1;
73 this->state_.EVENT1 = 7;
74 this->state_.RC_PD = 1;
75 this->state_.MIX_CURRENT = 2;
76 this->state_.LODIV_BUF_CURRENT_RX = 1;
77 this->state_.LNA2MIX_CURRENT = 1;
78 this->state_.LNA_CURRENT = 1;
79 this->state_.LODIV_BUF_CURRENT_TX = 1;
80 this->state_.FSCAL3_LO = 9;
81 this->state_.CHP_CURR_CAL_EN = 2;
82 this->state_.FSCAL3_HI = 2;
83 this->state_.FSCAL2 = 0x0A;
84 this->state_.FSCAL1 = 0x20;
85 this->state_.FSCAL0 = 0x0D;
86 this->state_.RCCTRL1 = 0x41;
87 this->state_.FSTEST = 0x59;
88 this->state_.PTEST = 0x7F;
89 this->state_.AGCTEST = 0x3F;
90 this->state_.TEST2 = 0x88;
91 this->state_.TEST1 = 0x31;
92 this->state_.TEST0_LO = 1;
93 this->state_.VCO_SEL_CAL_EN = 1;
94 this->state_.TEST0_HI = 2;
95
96 // PKTCTRL0
97 this->state_.PKT_FORMAT = 3;
98 this->state_.LENGTH_CONFIG = 2;
99 this->state_.FS_AUTOCAL = 1;
100
101 // CRITICAL: Initialize PA Table to avoid transmitting 0 power (Silence)
102 memset(this->pa_table_, 0, sizeof(this->pa_table_));
103}
104
106 this->spi_setup();
107 this->cs_->digital_write(true);
109 this->cs_->digital_write(false);
111 this->cs_->digital_write(true);
113 this->cs_->digital_write(false);
114 delay(5);
115
116 this->strobe_(Command::RES);
117 delay(5);
118
121 this->chip_id_ = encode_uint16(this->state_.PARTNUM, this->state_.VERSION);
122 ESP_LOGD(TAG, "CC1101 found! Chip ID: 0x%04X", this->chip_id_);
123 if (this->state_.VERSION == 0 || this->state_.PARTNUM == 0xFF) {
124 ESP_LOGE(TAG, "Failed to verify CC1101.");
125 this->mark_failed();
126 return;
127 }
128
129 // Setup GDO0 pin if configured
130 if (this->gdo0_pin_ != nullptr) {
131 this->gdo0_pin_->setup();
132 }
133
134 this->initialized_ = true;
135
136 for (uint8_t i = 0; i <= static_cast<uint8_t>(Register::TEST0); i++) {
137 if (i == static_cast<uint8_t>(Register::FSTEST) || i == static_cast<uint8_t>(Register::AGCTEST)) {
138 continue;
139 }
140 this->write_(static_cast<Register>(i));
141 }
143 if (!this->enter_rx_()) {
144 this->mark_failed();
145 return;
146 }
147
148 // Defer pin mode setup until after all components have completed setup()
149 // This handles the case where remote_transmitter runs after CC1101 and changes pin mode
150 if (this->gdo0_pin_ != nullptr) {
151 this->defer([this]() { this->gdo0_pin_->pin_mode(gpio::FLAG_INPUT); });
152 }
153}
154
155void CC1101Component::call_listeners_(const std::vector<uint8_t> &packet, float freq_offset, float rssi, uint8_t lqi) {
156 for (auto &listener : this->listeners_) {
157 listener->on_packet(packet, freq_offset, rssi, lqi);
158 }
159 this->packet_trigger_.trigger(packet, freq_offset, rssi, lqi);
160}
161
163 if (this->state_.PKT_FORMAT != static_cast<uint8_t>(PacketFormat::PACKET_FORMAT_FIFO) || this->gdo0_pin_ == nullptr ||
164 !this->gdo0_pin_->digital_read()) {
165 return;
166 }
167
168 // Read state
170 uint8_t rx_bytes = this->state_.NUM_RXBYTES;
171 bool overflow = this->state_.RXFIFO_OVERFLOW;
172 if (overflow || rx_bytes == 0) {
173 ESP_LOGW(TAG, "RX FIFO overflow, flushing");
174 this->enter_idle_();
175 this->strobe_(Command::FRX);
176 this->enter_rx_();
177 return;
178 }
179
180 // Read packet
181 uint8_t payload_length, expected_rx;
182 if (this->state_.LENGTH_CONFIG == static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_VARIABLE)) {
183 this->read_(Register::FIFO, &payload_length, 1);
184 expected_rx = payload_length + 1;
185 } else {
186 payload_length = this->state_.PKTLEN;
187 expected_rx = payload_length;
188 }
189 if (payload_length == 0 || payload_length > 64 || rx_bytes != expected_rx) {
190 ESP_LOGW(TAG, "Invalid packet: rx_bytes %u, payload_length %u", rx_bytes, payload_length);
191 this->enter_idle_();
192 this->strobe_(Command::FRX);
193 this->enter_rx_();
194 return;
195 }
196 this->packet_.resize(payload_length);
197 this->read_(Register::FIFO, this->packet_.data(), payload_length);
198
199 // Read status from registers (more reliable than FIFO status bytes due to timing issues)
201 this->read_(Register::RSSI);
202 this->read_(Register::LQI);
203 float freq_offset = static_cast<int8_t>(this->state_.FREQEST) * (XTAL_FREQUENCY / (1 << 14));
204 float rssi = (this->state_.RSSI * RSSI_STEP) - RSSI_OFFSET;
205 bool crc_ok = (this->state_.LQI & STATUS_CRC_OK_MASK) != 0;
206 uint8_t lqi = this->state_.LQI & STATUS_LQI_MASK;
207 if (this->state_.CRC_EN == 0 || crc_ok) {
208 this->call_listeners_(this->packet_, freq_offset, rssi, lqi);
209 }
210
211 // Return to rx
212 this->enter_idle_();
213 this->strobe_(Command::FRX);
214 this->enter_rx_();
215}
216
218 static const char *const MODULATION_NAMES[] = {"2-FSK", "GFSK", "UNUSED", "ASK/OOK",
219 "4-FSK", "UNUSED", "UNUSED", "MSK"};
220 int32_t freq = static_cast<int32_t>(this->state_.FREQ2 << 16 | this->state_.FREQ1 << 8 | this->state_.FREQ0) *
221 XTAL_FREQUENCY / (1 << 16);
222 float symbol_rate = (((256.0f + this->state_.DRATE_M) * (1 << this->state_.DRATE_E)) / (1 << 28)) * XTAL_FREQUENCY;
223 float bw = XTAL_FREQUENCY / (8.0f * (4 + this->state_.CHANBW_M) * (1 << this->state_.CHANBW_E));
224 ESP_LOGCONFIG(TAG,
225 "CC1101:\n"
226 " Chip ID: 0x%04X\n"
227 " Frequency: %" PRId32 " Hz\n"
228 " Channel: %u\n"
229 " Modulation: %s\n"
230 " Symbol Rate: %.0f baud\n"
231 " Filter Bandwidth: %.1f Hz\n"
232 " Output Power: %.1f dBm",
233 this->chip_id_, freq, this->state_.CHANNR, MODULATION_NAMES[this->state_.MOD_FORMAT & 0x07],
234 symbol_rate, bw, this->output_power_effective_);
235 LOG_PIN(" CS Pin: ", this->cs_);
236}
237
239 // Ensure Packet Format is 3 (Async Serial)
240 this->write_(Register::PKTCTRL0, 0x32);
241 ESP_LOGV(TAG, "Beginning TX sequence");
242 if (this->gdo0_pin_ != nullptr) {
244 }
245 // Transition through IDLE to bypass CCA (Clear Channel Assessment) which can
246 // block TX entry when strobing from RX, and to ensure FS_AUTOCAL calibration
247 this->enter_idle_();
248 if (!this->enter_tx_()) {
249 ESP_LOGW(TAG, "Failed to enter TX state!");
250 }
251}
252
254 ESP_LOGV(TAG, "Beginning RX sequence");
255 if (this->gdo0_pin_ != nullptr) {
257 }
258 // Transition through IDLE to ensure FS_AUTOCAL calibration occurs
259 this->enter_idle_();
260 if (!this->enter_rx_()) {
261 ESP_LOGW(TAG, "Failed to enter RX state!");
262 }
263}
264
266 this->strobe_(Command::RES);
267 this->setup();
268}
269
271 ESP_LOGV(TAG, "Setting IDLE state");
272 this->enter_idle_();
273}
274
275bool CC1101Component::wait_for_state_(State target_state, uint32_t timeout_ms) {
276 uint32_t start = millis();
277 while (millis() - start < timeout_ms) {
279 State s = static_cast<State>(this->state_.MARC_STATE);
280 if (s == target_state) {
281 return true;
282 }
284 }
285 return false;
286}
287
289 // The PLL must be recalibrated until PLL lock is achieved
290 for (uint8_t retries = PLL_LOCK_RETRIES; retries > 0; retries--) {
291 this->strobe_(cmd);
292 if (!this->wait_for_state_(target_state)) {
293 return false;
294 }
295 this->read_(Register::FSCAL1);
296 if (this->state_.FSCAL1 != FSCAL1_PLL_NOT_LOCKED) {
297 return true;
298 }
299 ESP_LOGW(TAG, "PLL lock failed, retrying calibration");
300 this->enter_idle_();
301 }
302 ESP_LOGE(TAG, "PLL lock failed after retries");
303 return false;
304}
305
310
312
314
316 uint8_t index = static_cast<uint8_t>(cmd);
317 if (cmd < Command::RES || cmd > Command::NOP) {
318 return 0xFF;
319 }
320 this->enable();
321 uint8_t status_byte = this->transfer_byte(index);
322 this->disable();
323 return status_byte;
324}
325
327 uint8_t index = static_cast<uint8_t>(reg);
328 this->enable();
329 this->write_byte(index);
330 this->write_array(&this->state_.regs()[index], 1);
331 this->disable();
332}
333
334void CC1101Component::write_(Register reg, uint8_t value) {
335 uint8_t index = static_cast<uint8_t>(reg);
336 this->state_.regs()[index] = value;
337 this->write_(reg);
338}
339
340void CC1101Component::write_(Register reg, const uint8_t *buffer, size_t length) {
341 uint8_t index = static_cast<uint8_t>(reg);
342 this->enable();
343 this->write_byte(index | BUS_WRITE | BUS_BURST);
344 this->write_array(buffer, length);
345 this->disable();
346}
347
349 uint8_t index = static_cast<uint8_t>(reg);
350 this->enable();
351 this->write_byte(index | BUS_READ | BUS_BURST);
352 this->state_.regs()[index] = this->transfer_byte(0);
353 this->disable();
354}
355
356void CC1101Component::read_(Register reg, uint8_t *buffer, size_t length) {
357 uint8_t index = static_cast<uint8_t>(reg);
358 this->enable();
359 this->write_byte(index | BUS_READ | BUS_BURST);
360 this->read_array(buffer, length);
361 this->disable();
362}
363
364CC1101Error CC1101Component::transmit_packet(const std::vector<uint8_t> &packet) {
365 if (this->state_.PKT_FORMAT != static_cast<uint8_t>(PacketFormat::PACKET_FORMAT_FIFO)) {
366 return CC1101Error::PARAMS;
367 }
368
369 // Write packet
370 this->enter_idle_();
371 this->strobe_(Command::FTX);
372 if (this->state_.LENGTH_CONFIG == static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_VARIABLE)) {
373 this->write_(Register::FIFO, static_cast<uint8_t>(packet.size()));
374 }
375 this->write_(Register::FIFO, packet.data(), packet.size());
376
377 // Calibrate PLL
379 ESP_LOGW(TAG, "PLL lock failed during TX");
380 this->enter_idle_();
381 this->enter_rx_();
383 }
384
385 // Transmit packet
386 this->strobe_(Command::TX);
387 if (!this->wait_for_state_(State::IDLE, 1000)) {
388 ESP_LOGW(TAG, "TX timeout");
389 this->enter_idle_();
390 this->enter_rx_();
392 }
393
394 // Return to rx
395 this->enter_rx_();
396 return CC1101Error::NONE;
397}
398
399// Setters
401 this->output_power_requested_ = value;
402 int32_t freq = static_cast<int32_t>(this->state_.FREQ2 << 16 | this->state_.FREQ1 << 8 | this->state_.FREQ0) *
403 XTAL_FREQUENCY / (1 << 16);
404 uint8_t a = 0xC0;
405 if (freq >= 300000000 && freq <= 348000000) {
406 a = PowerTableItem::find(PA_TABLE_315, sizeof(PA_TABLE_315) / sizeof(PA_TABLE_315[0]), value);
407 } else if (freq >= 378000000 && freq <= 464000000) {
408 a = PowerTableItem::find(PA_TABLE_433, sizeof(PA_TABLE_433) / sizeof(PA_TABLE_433[0]), value);
409 } else if (freq >= 779000000 && freq < 900000000) {
410 a = PowerTableItem::find(PA_TABLE_868, sizeof(PA_TABLE_868) / sizeof(PA_TABLE_868[0]), value);
411 } else if (freq >= 900000000 && freq <= 928000000) {
412 a = PowerTableItem::find(PA_TABLE_915, sizeof(PA_TABLE_915) / sizeof(PA_TABLE_915[0]), value);
413 }
414
415 if (static_cast<Modulation>(this->state_.MOD_FORMAT) == Modulation::MODULATION_ASK_OOK) {
416 this->pa_table_[0] = 0;
417 this->pa_table_[1] = a;
418 } else {
419 this->pa_table_[0] = a;
420 this->pa_table_[1] = 0;
421 }
422 this->output_power_effective_ = value;
423 if (this->initialized_) {
424 this->write_(Register::PATABLE, this->pa_table_, sizeof(this->pa_table_));
425 }
426}
427
429 this->state_.CLOSE_IN_RX = static_cast<uint8_t>(value);
430 if (this->initialized_) {
432 }
433}
434
436 this->state_.DEM_DCFILT_OFF = value ? 0 : 1;
437 if (this->initialized_) {
439 }
440}
441
443 int32_t freq = static_cast<int32_t>(value * (1 << 16) / XTAL_FREQUENCY);
444 this->state_.FREQ2 = static_cast<uint8_t>(freq >> 16);
445 this->state_.FREQ1 = static_cast<uint8_t>(freq >> 8);
446 this->state_.FREQ0 = static_cast<uint8_t>(freq);
447 if (this->initialized_) {
448 this->enter_idle_();
449 this->write_(Register::FREQ2);
450 this->write_(Register::FREQ1);
451 this->write_(Register::FREQ0);
452 this->enter_rx_();
453 }
454}
455
457 this->state_.FREQ_IF = value * (1 << 10) / XTAL_FREQUENCY;
458 if (this->initialized_) {
460 }
461}
462
464 uint8_t e;
465 uint32_t m;
466 split_float(XTAL_FREQUENCY / (value * 8), 2, e, m);
467 this->state_.CHANBW_E = e;
468 this->state_.CHANBW_M = static_cast<uint8_t>(m);
469 if (this->initialized_) {
471 }
472}
473
474void CC1101Component::set_channel(uint8_t value) {
475 this->state_.CHANNR = value;
476 if (this->initialized_) {
477 this->enter_idle_();
479 this->enter_rx_();
480 }
481}
482
484 uint8_t e;
485 uint32_t m;
486 split_float(value * (1 << 18) / XTAL_FREQUENCY, 8, e, m);
487 this->state_.CHANSPC_E = e;
488 this->state_.CHANSPC_M = static_cast<uint8_t>(m);
489 if (this->initialized_) {
492 }
493}
494
496 uint8_t e;
497 uint32_t m;
498 split_float(value * (1 << 17) / XTAL_FREQUENCY, 3, e, m);
499 this->state_.DEVIATION_E = e;
500 this->state_.DEVIATION_M = static_cast<uint8_t>(m);
501 if (this->initialized_) {
503 }
504}
505
507 this->state_.DEVIATION_E = 0;
508 this->state_.DEVIATION_M = value - 1;
509 if (this->initialized_) {
511 }
512}
513
515 uint8_t e;
516 uint32_t m;
517 split_float(value * (1 << 28) / XTAL_FREQUENCY, 8, e, m);
518 this->state_.DRATE_E = e;
519 this->state_.DRATE_M = static_cast<uint8_t>(m);
520 if (this->initialized_) {
523 }
524}
525
527 this->state_.SYNC_MODE = static_cast<uint8_t>(value);
528 if (this->initialized_) {
530 }
531}
532
534 this->state_.CARRIER_SENSE_ABOVE_THRESHOLD = value ? 1 : 0;
535 if (this->initialized_) {
537 }
538}
539
541 this->state_.MOD_FORMAT = static_cast<uint8_t>(value);
542 this->state_.PA_POWER = value == Modulation::MODULATION_ASK_OOK ? 1 : 0;
543 if (this->initialized_) {
544 this->enter_idle_();
548 this->enter_rx_();
549 }
550}
551
553 this->state_.MANCHESTER_EN = value ? 1 : 0;
554 if (this->initialized_) {
556 }
557}
558
560 this->state_.NUM_PREAMBLE = value;
561 if (this->initialized_) {
563 }
564}
565
566void CC1101Component::set_sync1(uint8_t value) {
567 this->state_.SYNC1 = value;
568 if (this->initialized_) {
569 this->write_(Register::SYNC1);
570 }
571}
572
573void CC1101Component::set_sync0(uint8_t value) {
574 this->state_.SYNC0 = value;
575 if (this->initialized_) {
576 this->write_(Register::SYNC0);
577 }
578}
579
581 this->state_.MAGN_TARGET = static_cast<uint8_t>(value);
582 if (this->initialized_) {
584 }
585}
586
588 this->state_.MAX_LNA_GAIN = static_cast<uint8_t>(value);
589 if (this->initialized_) {
591 }
592}
593
595 this->state_.MAX_DVGA_GAIN = static_cast<uint8_t>(value);
596 if (this->initialized_) {
598 }
599}
600
602 this->state_.CARRIER_SENSE_ABS_THR = static_cast<uint8_t>(value & 0b1111);
603 if (this->initialized_) {
605 }
606}
607
609 this->state_.CARRIER_SENSE_REL_THR = static_cast<uint8_t>(value);
610 if (this->initialized_) {
612 }
613}
614
616 this->state_.AGC_LNA_PRIORITY = value ? 1 : 0;
617 if (this->initialized_) {
619 }
620}
621
623 this->state_.FILTER_LENGTH = static_cast<uint8_t>(value);
624 if (this->initialized_) {
626 }
627}
628
630 this->state_.FILTER_LENGTH = static_cast<uint8_t>(value);
631 if (this->initialized_) {
633 }
634}
635
637 this->state_.AGC_FREEZE = static_cast<uint8_t>(value);
638 if (this->initialized_) {
640 }
641}
642
644 this->state_.WAIT_TIME = static_cast<uint8_t>(value);
645 if (this->initialized_) {
647 }
648}
649
651 this->state_.HYST_LEVEL = static_cast<uint8_t>(value);
652 if (this->initialized_) {
654 }
655}
656
658 this->state_.PKT_FORMAT =
660 if (value) {
661 // Configure GDO0 for FIFO status (asserts on RX FIFO threshold or end of packet)
662 this->state_.GDO0_CFG = 0x01;
663 // Set max RX FIFO threshold to ensure we only trigger on end-of-packet
664 this->state_.FIFO_THR = 15;
665 // Don't append status bytes to FIFO - we read from registers instead
666 this->state_.APPEND_STATUS = 0;
667 } else {
668 // Configure GDO0 for serial data (async serial mode)
669 this->state_.GDO0_CFG = 0x0D;
670 }
671 if (this->initialized_) {
676 }
677}
678
680 if (value == 0) {
681 this->state_.LENGTH_CONFIG = static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_VARIABLE);
682 } else {
683 this->state_.LENGTH_CONFIG = static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_FIXED);
684 this->state_.PKTLEN = value;
685 }
686 if (this->initialized_) {
689 }
690}
691
693 this->state_.CRC_EN = value ? 1 : 0;
694 if (this->initialized_) {
696 }
697}
698
700 this->state_.WHITE_DATA = value ? 1 : 0;
701 if (this->initialized_) {
703 }
704}
705
706} // namespace esphome::cc1101
uint8_t m
Definition bl0906.h:1
virtual void mark_failed()
Mark this component as failed.
ESPDEPRECATED("Use const char* overload instead. Removed in 2026.7.0", "2026.1.0") void defer(const std voi defer)(const char *name, std::function< void()> &&f)
Defer a callback to the next loop() call.
Definition component.h:479
virtual void pin_mode(gpio::Flags flags)=0
virtual void setup()=0
virtual void digital_write(bool value)=0
void trigger(const Ts &...x)
Inform the parent automation that the event has triggered.
Definition automation.h:279
void set_packet_mode(bool value)
Definition cc1101.cpp:657
void set_max_dvga_gain(MaxDvgaGain value)
Definition cc1101.cpp:594
void set_whitening(bool value)
Definition cc1101.cpp:699
void set_carrier_sense_above_threshold(bool value)
Definition cc1101.cpp:533
void write_(Register reg)
Definition cc1101.cpp:326
void set_sync0(uint8_t value)
Definition cc1101.cpp:573
void set_freeze(Freeze value)
Definition cc1101.cpp:636
void call_listeners_(const std::vector< uint8_t > &packet, float freq_offset, float rssi, uint8_t lqi)
Definition cc1101.cpp:155
void set_rx_attenuation(RxAttenuation value)
Definition cc1101.cpp:428
InternalGPIOPin * gdo0_pin_
Definition cc1101.h:95
void set_symbol_rate(float value)
Definition cc1101.cpp:514
uint8_t strobe_(Command cmd)
Definition cc1101.cpp:315
void set_sync_mode(SyncMode value)
Definition cc1101.cpp:526
void set_fsk_deviation(float value)
Definition cc1101.cpp:495
void set_msk_deviation(uint8_t value)
Definition cc1101.cpp:506
void set_carrier_sense_rel_thr(CarrierSenseRelThr value)
Definition cc1101.cpp:608
uint8_t pa_table_[PA_TABLE_SIZE]
Definition cc1101.h:90
void set_lna_priority(bool value)
Definition cc1101.cpp:615
void set_output_power(float value)
Definition cc1101.cpp:400
void set_modulation_type(Modulation value)
Definition cc1101.cpp:540
void set_if_frequency(float value)
Definition cc1101.cpp:456
void set_frequency(float value)
Definition cc1101.cpp:442
void set_num_preamble(uint8_t value)
Definition cc1101.cpp:559
void set_hyst_level(HystLevel value)
Definition cc1101.cpp:650
void set_filter_bandwidth(float value)
Definition cc1101.cpp:463
void set_filter_length_fsk_msk(FilterLengthFskMsk value)
Definition cc1101.cpp:622
void set_crc_enable(bool value)
Definition cc1101.cpp:692
void set_carrier_sense_abs_thr(int8_t value)
Definition cc1101.cpp:601
bool enter_calibrated_(State target_state, Command cmd)
Definition cc1101.cpp:288
void set_magn_target(MagnTarget value)
Definition cc1101.cpp:580
void set_channel_spacing(float value)
Definition cc1101.cpp:483
CC1101Error transmit_packet(const std::vector< uint8_t > &packet)
Definition cc1101.cpp:364
void set_wait_time(WaitTime value)
Definition cc1101.cpp:643
std::vector< CC1101Listener * > listeners_
Definition cc1101.h:101
void set_dc_blocking_filter(bool value)
Definition cc1101.cpp:435
void set_packet_length(uint8_t value)
Definition cc1101.cpp:679
void set_manchester(bool value)
Definition cc1101.cpp:552
std::vector< uint8_t > packet_
Definition cc1101.h:100
void set_channel(uint8_t value)
Definition cc1101.cpp:474
void set_filter_length_ask_ook(FilterLengthAskOok value)
Definition cc1101.cpp:629
void set_max_lna_gain(MaxLnaGain value)
Definition cc1101.cpp:587
void set_sync1(uint8_t value)
Definition cc1101.cpp:566
bool wait_for_state_(State target_state, uint32_t timeout_ms=100)
Definition cc1101.cpp:275
Trigger< std::vector< uint8_t >, float, float, uint8_t > packet_trigger_
Definition cc1101.h:99
@ FLAG_OUTPUT
Definition gpio.h:28
@ FLAG_INPUT
Definition gpio.h:27
void IRAM_ATTR HOT delayMicroseconds(uint32_t us)
Definition core.cpp:28
constexpr uint16_t encode_uint16(uint8_t msb, uint8_t lsb)
Encode a 16-bit value given the most and least significant byte.
Definition helpers.h:528
void IRAM_ATTR HOT delay(uint32_t ms)
Definition core.cpp:26
uint32_t IRAM_ATTR HOT millis()
Definition core.cpp:25
static uint8_t find(const PowerTableItem *items, size_t count, float &dbm_target)
Definition cc1101pa.h:15
uint16_t length
Definition tt21100.cpp:0