ESPHome 2025.12.5
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cc1101.cpp
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1#include "cc1101.h"
2#include "cc1101pa.h"
4#include "esphome/core/log.h"
5#include <cmath>
6
7namespace esphome::cc1101 {
8
9static const char *const TAG = "cc1101";
10
11static void split_float(float value, int mbits, uint8_t &e, uint32_t &m) {
12 int e_tmp;
13 float m_tmp = std::frexp(value, &e_tmp);
14 if (e_tmp <= mbits) {
15 e = 0;
16 m = 0;
17 return;
18 }
19 e = static_cast<uint8_t>(e_tmp - mbits - 1);
20 m = static_cast<uint32_t>(((m_tmp * 2 - 1) * (1 << (mbits + 1))) + 1) >> 1;
21 if (m == (1UL << mbits)) {
22 e = e + 1;
23 m = 0;
24 }
25}
26
28 // Datasheet defaults
29 memset(&this->state_, 0, sizeof(this->state_));
30 this->state_.GDO2_CFG = 0x0D; // Serial Data (for RX on GDO2)
31 this->state_.GDO1_CFG = 0x2E;
32 this->state_.GDO0_CFG = 0x0D; // Serial Data (for RX on GDO0 / TX Input)
33 this->state_.FIFO_THR = 7;
34 this->state_.SYNC1 = 0xD3;
35 this->state_.SYNC0 = 0x91;
36 this->state_.PKTLEN = 0xFF;
37 this->state_.APPEND_STATUS = 1;
38 this->state_.LENGTH_CONFIG = 1;
39 this->state_.CRC_EN = 1;
40 this->state_.WHITE_DATA = 1;
41 this->state_.FREQ_IF = 0x0F;
42 this->state_.FREQ2 = 0x1E;
43 this->state_.FREQ1 = 0xC4;
44 this->state_.FREQ0 = 0xEC;
45 this->state_.DRATE_E = 0x0C;
46 this->state_.CHANBW_E = 0x02;
47 this->state_.DRATE_M = 0x22;
48 this->state_.SYNC_MODE = 2;
49 this->state_.CHANSPC_E = 2;
50 this->state_.NUM_PREAMBLE = 2;
51 this->state_.CHANSPC_M = 0xF8;
52 this->state_.DEVIATION_M = 7;
53 this->state_.DEVIATION_E = 4;
54 this->state_.RX_TIME = 7;
55 this->state_.CCA_MODE = 3;
56 this->state_.PO_TIMEOUT = 1;
57 this->state_.FOC_LIMIT = 2;
58 this->state_.FOC_POST_K = 1;
59 this->state_.FOC_PRE_K = 2;
60 this->state_.FOC_BS_CS_GATE = 1;
61 this->state_.BS_POST_KP = 1;
62 this->state_.BS_POST_KI = 1;
63 this->state_.BS_PRE_KP = 2;
64 this->state_.BS_PRE_KI = 1;
65 this->state_.MAGN_TARGET = 3;
66 this->state_.AGC_LNA_PRIORITY = 1;
67 this->state_.FILTER_LENGTH = 1;
68 this->state_.WAIT_TIME = 1;
69 this->state_.HYST_LEVEL = 2;
70 this->state_.WOREVT1 = 0x87;
71 this->state_.WOREVT0 = 0x6B;
72 this->state_.RC_CAL = 1;
73 this->state_.EVENT1 = 7;
74 this->state_.RC_PD = 1;
75 this->state_.MIX_CURRENT = 2;
76 this->state_.LODIV_BUF_CURRENT_RX = 1;
77 this->state_.LNA2MIX_CURRENT = 1;
78 this->state_.LNA_CURRENT = 1;
79 this->state_.LODIV_BUF_CURRENT_TX = 1;
80 this->state_.FSCAL3_LO = 9;
81 this->state_.CHP_CURR_CAL_EN = 2;
82 this->state_.FSCAL3_HI = 2;
83 this->state_.FSCAL2 = 0x0A;
84 this->state_.FSCAL1 = 0x20;
85 this->state_.FSCAL0 = 0x0D;
86 this->state_.RCCTRL1 = 0x41;
87 this->state_.FSTEST = 0x59;
88 this->state_.PTEST = 0x7F;
89 this->state_.AGCTEST = 0x3F;
90 this->state_.TEST2 = 0x88;
91 this->state_.TEST1 = 0x31;
92 this->state_.TEST0_LO = 1;
93 this->state_.VCO_SEL_CAL_EN = 1;
94 this->state_.TEST0_HI = 2;
95
96 // PKTCTRL0
97 this->state_.PKT_FORMAT = 3;
98 this->state_.LENGTH_CONFIG = 2;
99 this->state_.FS_AUTOCAL = 1;
100
101 // CRITICAL: Initialize PA Table to avoid transmitting 0 power (Silence)
102 memset(this->pa_table_, 0, sizeof(this->pa_table_));
103}
104
106 this->spi_setup();
107 this->cs_->digital_write(true);
109 this->cs_->digital_write(false);
111 this->cs_->digital_write(true);
113 this->cs_->digital_write(false);
114 delay(5);
115
116 this->strobe_(Command::RES);
117 delay(5);
118
121 this->chip_id_ = encode_uint16(this->state_.PARTNUM, this->state_.VERSION);
122 ESP_LOGD(TAG, "CC1101 found! Chip ID: 0x%04X", this->chip_id_);
123 if (this->state_.VERSION == 0 || this->state_.PARTNUM == 0xFF) {
124 ESP_LOGE(TAG, "Failed to verify CC1101.");
125 this->mark_failed();
126 return;
127 }
128
129 // Setup GDO0 pin if configured
130 if (this->gdo0_pin_ != nullptr) {
131 this->gdo0_pin_->setup();
132 }
133
134 this->initialized_ = true;
135
136 for (uint8_t i = 0; i <= static_cast<uint8_t>(Register::TEST0); i++) {
137 if (i == static_cast<uint8_t>(Register::FSTEST) || i == static_cast<uint8_t>(Register::AGCTEST)) {
138 continue;
139 }
140 this->write_(static_cast<Register>(i));
141 }
143 if (!this->enter_rx_()) {
144 this->mark_failed();
145 return;
146 }
147
148 // Defer pin mode setup until after all components have completed setup()
149 // This handles the case where remote_transmitter runs after CC1101 and changes pin mode
150 if (this->gdo0_pin_ != nullptr) {
151 this->defer([this]() { this->gdo0_pin_->pin_mode(gpio::FLAG_INPUT); });
152 }
153}
154
156 if (this->state_.PKT_FORMAT != static_cast<uint8_t>(PacketFormat::PACKET_FORMAT_FIFO) || this->gdo0_pin_ == nullptr ||
157 !this->gdo0_pin_->digital_read()) {
158 return;
159 }
160
161 // Read state
163 uint8_t rx_bytes = this->state_.NUM_RXBYTES;
164 bool overflow = this->state_.RXFIFO_OVERFLOW;
165 if (overflow || rx_bytes == 0) {
166 ESP_LOGW(TAG, "RX FIFO overflow, flushing");
167 this->enter_idle_();
168 this->strobe_(Command::FRX);
169 this->enter_rx_();
170 return;
171 }
172
173 // Read packet
174 uint8_t payload_length, expected_rx;
175 if (this->state_.LENGTH_CONFIG == static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_VARIABLE)) {
176 this->read_(Register::FIFO, &payload_length, 1);
177 expected_rx = payload_length + 1;
178 } else {
179 payload_length = this->state_.PKTLEN;
180 expected_rx = payload_length;
181 }
182 if (payload_length == 0 || payload_length > 64 || rx_bytes != expected_rx) {
183 ESP_LOGW(TAG, "Invalid packet: rx_bytes %u, payload_length %u", rx_bytes, payload_length);
184 this->enter_idle_();
185 this->strobe_(Command::FRX);
186 this->enter_rx_();
187 return;
188 }
189 this->packet_.resize(payload_length);
190 this->read_(Register::FIFO, this->packet_.data(), payload_length);
191
192 // Read status from registers (more reliable than FIFO status bytes due to timing issues)
193 this->read_(Register::RSSI);
194 this->read_(Register::LQI);
195 float rssi = (this->state_.RSSI * RSSI_STEP) - RSSI_OFFSET;
196 bool crc_ok = (this->state_.LQI & STATUS_CRC_OK_MASK) != 0;
197 uint8_t lqi = this->state_.LQI & STATUS_LQI_MASK;
198 if (this->state_.CRC_EN == 0 || crc_ok) {
199 this->packet_trigger_->trigger(this->packet_, rssi, lqi);
200 }
201
202 // Return to rx
203 this->enter_idle_();
204 this->strobe_(Command::FRX);
205 this->enter_rx_();
206}
207
209 static const char *const MODULATION_NAMES[] = {"2-FSK", "GFSK", "UNUSED", "ASK/OOK",
210 "4-FSK", "UNUSED", "UNUSED", "MSK"};
211 int32_t freq = static_cast<int32_t>(this->state_.FREQ2 << 16 | this->state_.FREQ1 << 8 | this->state_.FREQ0) *
212 XTAL_FREQUENCY / (1 << 16);
213 float symbol_rate = (((256.0f + this->state_.DRATE_M) * (1 << this->state_.DRATE_E)) / (1 << 28)) * XTAL_FREQUENCY;
214 float bw = XTAL_FREQUENCY / (8.0f * (4 + this->state_.CHANBW_M) * (1 << this->state_.CHANBW_E));
215 ESP_LOGCONFIG(TAG, "CC1101:");
216 LOG_PIN(" CS Pin: ", this->cs_);
217 ESP_LOGCONFIG(TAG,
218 " Chip ID: 0x%04X\n"
219 " Frequency: %" PRId32 " Hz\n"
220 " Channel: %u\n"
221 " Modulation: %s\n"
222 " Symbol Rate: %.0f baud\n"
223 " Filter Bandwidth: %.1f Hz\n"
224 " Output Power: %.1f dBm",
225 this->chip_id_, freq, this->state_.CHANNR, MODULATION_NAMES[this->state_.MOD_FORMAT & 0x07],
226 symbol_rate, bw, this->output_power_effective_);
227}
228
230 // Ensure Packet Format is 3 (Async Serial)
231 this->write_(Register::PKTCTRL0, 0x32);
232 ESP_LOGV(TAG, "Beginning TX sequence");
233 if (this->gdo0_pin_ != nullptr) {
235 }
236 if (!this->enter_tx_()) {
237 ESP_LOGW(TAG, "Failed to enter TX state!");
238 }
239}
240
242 ESP_LOGV(TAG, "Beginning RX sequence");
243 if (this->gdo0_pin_ != nullptr) {
245 }
246 if (!this->enter_rx_()) {
247 ESP_LOGW(TAG, "Failed to enter RX state!");
248 }
249}
250
252 this->strobe_(Command::RES);
253 this->setup();
254}
255
257 ESP_LOGV(TAG, "Setting IDLE state");
258 this->enter_idle_();
259}
260
261bool CC1101Component::wait_for_state_(State target_state, uint32_t timeout_ms) {
262 uint32_t start = millis();
263 while (millis() - start < timeout_ms) {
265 State s = static_cast<State>(this->state_.MARC_STATE);
266 if (s == target_state) {
267 return true;
268 }
270 }
271 return false;
272}
273
275 // The PLL must be recalibrated until PLL lock is achieved
276 for (uint8_t retries = PLL_LOCK_RETRIES; retries > 0; retries--) {
277 this->strobe_(cmd);
278 if (!this->wait_for_state_(target_state)) {
279 return false;
280 }
281 this->read_(Register::FSCAL1);
282 if (this->state_.FSCAL1 != FSCAL1_PLL_NOT_LOCKED) {
283 return true;
284 }
285 ESP_LOGW(TAG, "PLL lock failed, retrying calibration");
286 this->enter_idle_();
287 }
288 ESP_LOGE(TAG, "PLL lock failed after retries");
289 return false;
290}
291
296
298
300
302 uint8_t index = static_cast<uint8_t>(cmd);
303 if (cmd < Command::RES || cmd > Command::NOP) {
304 return 0xFF;
305 }
306 this->enable();
307 uint8_t status_byte = this->transfer_byte(index);
308 this->disable();
309 return status_byte;
310}
311
313 uint8_t index = static_cast<uint8_t>(reg);
314 this->enable();
315 this->write_byte(index);
316 this->write_array(&this->state_.regs()[index], 1);
317 this->disable();
318}
319
320void CC1101Component::write_(Register reg, uint8_t value) {
321 uint8_t index = static_cast<uint8_t>(reg);
322 this->state_.regs()[index] = value;
323 this->write_(reg);
324}
325
326void CC1101Component::write_(Register reg, const uint8_t *buffer, size_t length) {
327 uint8_t index = static_cast<uint8_t>(reg);
328 this->enable();
329 this->write_byte(index | BUS_WRITE | BUS_BURST);
330 this->write_array(buffer, length);
331 this->disable();
332}
333
335 uint8_t index = static_cast<uint8_t>(reg);
336 this->enable();
337 this->write_byte(index | BUS_READ | BUS_BURST);
338 this->state_.regs()[index] = this->transfer_byte(0);
339 this->disable();
340}
341
342void CC1101Component::read_(Register reg, uint8_t *buffer, size_t length) {
343 uint8_t index = static_cast<uint8_t>(reg);
344 this->enable();
345 this->write_byte(index | BUS_READ | BUS_BURST);
346 this->read_array(buffer, length);
347 this->disable();
348}
349
350CC1101Error CC1101Component::transmit_packet(const std::vector<uint8_t> &packet) {
351 if (this->state_.PKT_FORMAT != static_cast<uint8_t>(PacketFormat::PACKET_FORMAT_FIFO)) {
352 return CC1101Error::PARAMS;
353 }
354
355 // Write packet
356 this->enter_idle_();
357 this->strobe_(Command::FTX);
358 if (this->state_.LENGTH_CONFIG == static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_VARIABLE)) {
359 this->write_(Register::FIFO, static_cast<uint8_t>(packet.size()));
360 }
361 this->write_(Register::FIFO, packet.data(), packet.size());
362
363 // Calibrate PLL
365 ESP_LOGW(TAG, "PLL lock failed during TX");
366 this->enter_idle_();
367 this->enter_rx_();
369 }
370
371 // Transmit packet
372 this->strobe_(Command::TX);
373 if (!this->wait_for_state_(State::IDLE, 1000)) {
374 ESP_LOGW(TAG, "TX timeout");
375 this->enter_idle_();
376 this->enter_rx_();
378 }
379
380 // Return to rx
381 this->enter_rx_();
382 return CC1101Error::NONE;
383}
384
385// Setters
387 this->output_power_requested_ = value;
388 int32_t freq = static_cast<int32_t>(this->state_.FREQ2 << 16 | this->state_.FREQ1 << 8 | this->state_.FREQ0) *
389 XTAL_FREQUENCY / (1 << 16);
390 uint8_t a = 0xC0;
391 if (freq >= 300000000 && freq <= 348000000) {
392 a = PowerTableItem::find(PA_TABLE_315, sizeof(PA_TABLE_315) / sizeof(PA_TABLE_315[0]), value);
393 } else if (freq >= 378000000 && freq <= 464000000) {
394 a = PowerTableItem::find(PA_TABLE_433, sizeof(PA_TABLE_433) / sizeof(PA_TABLE_433[0]), value);
395 } else if (freq >= 779000000 && freq < 900000000) {
396 a = PowerTableItem::find(PA_TABLE_868, sizeof(PA_TABLE_868) / sizeof(PA_TABLE_868[0]), value);
397 } else if (freq >= 900000000 && freq <= 928000000) {
398 a = PowerTableItem::find(PA_TABLE_915, sizeof(PA_TABLE_915) / sizeof(PA_TABLE_915[0]), value);
399 }
400
401 if (static_cast<Modulation>(this->state_.MOD_FORMAT) == Modulation::MODULATION_ASK_OOK) {
402 this->pa_table_[0] = 0;
403 this->pa_table_[1] = a;
404 } else {
405 this->pa_table_[0] = a;
406 this->pa_table_[1] = 0;
407 }
408 this->output_power_effective_ = value;
409 if (this->initialized_) {
410 this->write_(Register::PATABLE, this->pa_table_, sizeof(this->pa_table_));
411 }
412}
413
415 this->state_.CLOSE_IN_RX = static_cast<uint8_t>(value);
416 if (this->initialized_) {
418 }
419}
420
422 this->state_.DEM_DCFILT_OFF = value ? 0 : 1;
423 if (this->initialized_) {
425 }
426}
427
429 int32_t freq = static_cast<int32_t>(value * (1 << 16) / XTAL_FREQUENCY);
430 this->state_.FREQ2 = static_cast<uint8_t>(freq >> 16);
431 this->state_.FREQ1 = static_cast<uint8_t>(freq >> 8);
432 this->state_.FREQ0 = static_cast<uint8_t>(freq);
433 if (this->initialized_) {
434 this->enter_idle_();
435 this->write_(Register::FREQ2);
436 this->write_(Register::FREQ1);
437 this->write_(Register::FREQ0);
438 this->enter_rx_();
439 }
440}
441
443 this->state_.FREQ_IF = value * (1 << 10) / XTAL_FREQUENCY;
444 if (this->initialized_) {
446 }
447}
448
450 uint8_t e;
451 uint32_t m;
452 split_float(XTAL_FREQUENCY / (value * 8), 2, e, m);
453 this->state_.CHANBW_E = e;
454 this->state_.CHANBW_M = static_cast<uint8_t>(m);
455 if (this->initialized_) {
457 }
458}
459
460void CC1101Component::set_channel(uint8_t value) {
461 this->state_.CHANNR = value;
462 if (this->initialized_) {
463 this->enter_idle_();
465 this->enter_rx_();
466 }
467}
468
470 uint8_t e;
471 uint32_t m;
472 split_float(value * (1 << 18) / XTAL_FREQUENCY, 8, e, m);
473 this->state_.CHANSPC_E = e;
474 this->state_.CHANSPC_M = static_cast<uint8_t>(m);
475 if (this->initialized_) {
478 }
479}
480
482 uint8_t e;
483 uint32_t m;
484 split_float(value * (1 << 17) / XTAL_FREQUENCY, 3, e, m);
485 this->state_.DEVIATION_E = e;
486 this->state_.DEVIATION_M = static_cast<uint8_t>(m);
487 if (this->initialized_) {
489 }
490}
491
493 this->state_.DEVIATION_E = 0;
494 this->state_.DEVIATION_M = value - 1;
495 if (this->initialized_) {
497 }
498}
499
501 uint8_t e;
502 uint32_t m;
503 split_float(value * (1 << 28) / XTAL_FREQUENCY, 8, e, m);
504 this->state_.DRATE_E = e;
505 this->state_.DRATE_M = static_cast<uint8_t>(m);
506 if (this->initialized_) {
509 }
510}
511
513 this->state_.SYNC_MODE = static_cast<uint8_t>(value);
514 if (this->initialized_) {
516 }
517}
518
520 this->state_.CARRIER_SENSE_ABOVE_THRESHOLD = value ? 1 : 0;
521 if (this->initialized_) {
523 }
524}
525
527 this->state_.MOD_FORMAT = static_cast<uint8_t>(value);
528 this->state_.PA_POWER = value == Modulation::MODULATION_ASK_OOK ? 1 : 0;
529 if (this->initialized_) {
530 this->enter_idle_();
534 this->enter_rx_();
535 }
536}
537
539 this->state_.MANCHESTER_EN = value ? 1 : 0;
540 if (this->initialized_) {
542 }
543}
544
546 this->state_.NUM_PREAMBLE = value;
547 if (this->initialized_) {
549 }
550}
551
552void CC1101Component::set_sync1(uint8_t value) {
553 this->state_.SYNC1 = value;
554 if (this->initialized_) {
555 this->write_(Register::SYNC1);
556 }
557}
558
559void CC1101Component::set_sync0(uint8_t value) {
560 this->state_.SYNC0 = value;
561 if (this->initialized_) {
562 this->write_(Register::SYNC0);
563 }
564}
565
567 this->state_.MAGN_TARGET = static_cast<uint8_t>(value);
568 if (this->initialized_) {
570 }
571}
572
574 this->state_.MAX_LNA_GAIN = static_cast<uint8_t>(value);
575 if (this->initialized_) {
577 }
578}
579
581 this->state_.MAX_DVGA_GAIN = static_cast<uint8_t>(value);
582 if (this->initialized_) {
584 }
585}
586
588 this->state_.CARRIER_SENSE_ABS_THR = static_cast<uint8_t>(value & 0b1111);
589 if (this->initialized_) {
591 }
592}
593
595 this->state_.CARRIER_SENSE_REL_THR = static_cast<uint8_t>(value);
596 if (this->initialized_) {
598 }
599}
600
602 this->state_.AGC_LNA_PRIORITY = value ? 1 : 0;
603 if (this->initialized_) {
605 }
606}
607
609 this->state_.FILTER_LENGTH = static_cast<uint8_t>(value);
610 if (this->initialized_) {
612 }
613}
614
616 this->state_.FILTER_LENGTH = static_cast<uint8_t>(value);
617 if (this->initialized_) {
619 }
620}
621
623 this->state_.AGC_FREEZE = static_cast<uint8_t>(value);
624 if (this->initialized_) {
626 }
627}
628
630 this->state_.WAIT_TIME = static_cast<uint8_t>(value);
631 if (this->initialized_) {
633 }
634}
635
637 this->state_.HYST_LEVEL = static_cast<uint8_t>(value);
638 if (this->initialized_) {
640 }
641}
642
644 this->state_.PKT_FORMAT =
646 if (value) {
647 // Configure GDO0 for FIFO status (asserts on RX FIFO threshold or end of packet)
648 this->state_.GDO0_CFG = 0x01;
649 // Set max RX FIFO threshold to ensure we only trigger on end-of-packet
650 this->state_.FIFO_THR = 15;
651 // Don't append status bytes to FIFO - we read from registers instead
652 this->state_.APPEND_STATUS = 0;
653 } else {
654 // Configure GDO0 for serial data (async serial mode)
655 this->state_.GDO0_CFG = 0x0D;
656 }
657 if (this->initialized_) {
662 }
663}
664
666 if (value == 0) {
667 this->state_.LENGTH_CONFIG = static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_VARIABLE);
668 } else {
669 this->state_.LENGTH_CONFIG = static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_FIXED);
670 this->state_.PKTLEN = value;
671 }
672 if (this->initialized_) {
675 }
676}
677
679 this->state_.CRC_EN = value ? 1 : 0;
680 if (this->initialized_) {
682 }
683}
684
686 this->state_.WHITE_DATA = value ? 1 : 0;
687 if (this->initialized_) {
689 }
690}
691
692} // namespace esphome::cc1101
uint8_t m
Definition bl0906.h:1
virtual void mark_failed()
Mark this component as failed.
void defer(const std::string &name, std::function< void()> &&f)
Defer a callback to the next loop() call.
virtual void pin_mode(gpio::Flags flags)=0
virtual void setup()=0
virtual void digital_write(bool value)=0
void trigger(const Ts &...x)
Inform the parent automation that the event has triggered.
Definition automation.h:204
void set_packet_mode(bool value)
Definition cc1101.cpp:643
void set_max_dvga_gain(MaxDvgaGain value)
Definition cc1101.cpp:580
void set_whitening(bool value)
Definition cc1101.cpp:685
void set_carrier_sense_above_threshold(bool value)
Definition cc1101.cpp:519
void write_(Register reg)
Definition cc1101.cpp:312
void set_sync0(uint8_t value)
Definition cc1101.cpp:559
void set_freeze(Freeze value)
Definition cc1101.cpp:622
void set_rx_attenuation(RxAttenuation value)
Definition cc1101.cpp:414
InternalGPIOPin * gdo0_pin_
Definition cc1101.h:89
void set_symbol_rate(float value)
Definition cc1101.cpp:500
uint8_t strobe_(Command cmd)
Definition cc1101.cpp:301
void set_sync_mode(SyncMode value)
Definition cc1101.cpp:512
void set_fsk_deviation(float value)
Definition cc1101.cpp:481
void set_msk_deviation(uint8_t value)
Definition cc1101.cpp:492
void set_carrier_sense_rel_thr(CarrierSenseRelThr value)
Definition cc1101.cpp:594
uint8_t pa_table_[PA_TABLE_SIZE]
Definition cc1101.h:84
void set_lna_priority(bool value)
Definition cc1101.cpp:601
void set_output_power(float value)
Definition cc1101.cpp:386
void set_modulation_type(Modulation value)
Definition cc1101.cpp:526
void set_if_frequency(float value)
Definition cc1101.cpp:442
void set_frequency(float value)
Definition cc1101.cpp:428
void set_num_preamble(uint8_t value)
Definition cc1101.cpp:545
void set_hyst_level(HystLevel value)
Definition cc1101.cpp:636
void set_filter_bandwidth(float value)
Definition cc1101.cpp:449
void set_filter_length_fsk_msk(FilterLengthFskMsk value)
Definition cc1101.cpp:608
void set_crc_enable(bool value)
Definition cc1101.cpp:678
void set_carrier_sense_abs_thr(int8_t value)
Definition cc1101.cpp:587
bool enter_calibrated_(State target_state, Command cmd)
Definition cc1101.cpp:274
void set_magn_target(MagnTarget value)
Definition cc1101.cpp:566
void set_channel_spacing(float value)
Definition cc1101.cpp:469
CC1101Error transmit_packet(const std::vector< uint8_t > &packet)
Definition cc1101.cpp:350
void set_wait_time(WaitTime value)
Definition cc1101.cpp:629
void set_dc_blocking_filter(bool value)
Definition cc1101.cpp:421
void set_packet_length(uint8_t value)
Definition cc1101.cpp:665
void set_manchester(bool value)
Definition cc1101.cpp:538
std::vector< uint8_t > packet_
Definition cc1101.h:93
void set_channel(uint8_t value)
Definition cc1101.cpp:460
void set_filter_length_ask_ook(FilterLengthAskOok value)
Definition cc1101.cpp:615
void set_max_lna_gain(MaxLnaGain value)
Definition cc1101.cpp:573
Trigger< std::vector< uint8_t >, float, uint8_t > * packet_trigger_
Definition cc1101.h:92
void set_sync1(uint8_t value)
Definition cc1101.cpp:552
bool wait_for_state_(State target_state, uint32_t timeout_ms=100)
Definition cc1101.cpp:261
@ FLAG_OUTPUT
Definition gpio.h:19
@ FLAG_INPUT
Definition gpio.h:18
void IRAM_ATTR HOT delayMicroseconds(uint32_t us)
Definition core.cpp:33
constexpr uint16_t encode_uint16(uint8_t msb, uint8_t lsb)
Encode a 16-bit value given the most and least significant byte.
Definition helpers.h:397
void IRAM_ATTR HOT delay(uint32_t ms)
Definition core.cpp:31
uint32_t IRAM_ATTR HOT millis()
Definition core.cpp:30
static uint8_t find(const PowerTableItem *items, size_t count, float &dbm_target)
Definition cc1101pa.h:15
uint16_t length
Definition tt21100.cpp:0