ESPHome 2026.4.3
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cc1101.cpp
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1#include "cc1101.h"
2#include "cc1101pa.h"
4#include "esphome/core/log.h"
5#include <cmath>
6
7namespace esphome::cc1101 {
8
9static const char *const TAG = "cc1101";
10
11static void split_float(float value, int mbits, uint8_t &e, uint32_t &m) {
12 int e_tmp;
13 float m_tmp = std::frexp(value, &e_tmp);
14 if (e_tmp <= mbits) {
15 e = 0;
16 m = 0;
17 return;
18 }
19 e = static_cast<uint8_t>(e_tmp - mbits - 1);
20 m = static_cast<uint32_t>(((m_tmp * 2 - 1) * (1 << (mbits + 1))) + 1) >> 1;
21 if (m == (1UL << mbits)) {
22 e = e + 1;
23 m = 0;
24 }
25}
26
28 // Datasheet defaults
29 memset(&this->state_, 0, sizeof(this->state_));
30 this->state_.GDO2_CFG = 0x0D; // Serial Data (for RX on GDO2)
31 this->state_.GDO1_CFG = 0x2E;
32 this->state_.GDO0_CFG = 0x0D; // Serial Data (for RX on GDO0 / TX Input)
33 this->state_.FIFO_THR = 7;
34 this->state_.SYNC1 = 0xD3;
35 this->state_.SYNC0 = 0x91;
36 this->state_.PKTLEN = 0xFF;
37 this->state_.APPEND_STATUS = 1;
38 this->state_.LENGTH_CONFIG = 1;
39 this->state_.CRC_EN = 1;
40 this->state_.WHITE_DATA = 1;
41 this->state_.FREQ_IF = 0x0F;
42 this->state_.FREQ2 = 0x1E;
43 this->state_.FREQ1 = 0xC4;
44 this->state_.FREQ0 = 0xEC;
45 this->state_.DRATE_E = 0x0C;
46 this->state_.CHANBW_E = 0x02;
47 this->state_.DRATE_M = 0x22;
48 this->state_.SYNC_MODE = 2;
49 this->state_.CHANSPC_E = 2;
50 this->state_.NUM_PREAMBLE = 2;
51 this->state_.CHANSPC_M = 0xF8;
52 this->state_.DEVIATION_M = 7;
53 this->state_.DEVIATION_E = 4;
54 this->state_.RX_TIME = 7;
55 this->state_.CCA_MODE = 3;
56 this->state_.PO_TIMEOUT = 1;
57 this->state_.FOC_LIMIT = 2;
58 this->state_.FOC_POST_K = 1;
59 this->state_.FOC_PRE_K = 2;
60 this->state_.FOC_BS_CS_GATE = 1;
61 this->state_.BS_POST_KP = 1;
62 this->state_.BS_POST_KI = 1;
63 this->state_.BS_PRE_KP = 2;
64 this->state_.BS_PRE_KI = 1;
65 this->state_.MAGN_TARGET = 3;
66 this->state_.AGC_LNA_PRIORITY = 1;
67 this->state_.FILTER_LENGTH = 1;
68 this->state_.WAIT_TIME = 1;
69 this->state_.HYST_LEVEL = 2;
70 this->state_.WOREVT1 = 0x87;
71 this->state_.WOREVT0 = 0x6B;
72 this->state_.RC_CAL = 1;
73 this->state_.EVENT1 = 7;
74 this->state_.RC_PD = 1;
75 this->state_.MIX_CURRENT = 2;
76 this->state_.LODIV_BUF_CURRENT_RX = 1;
77 this->state_.LNA2MIX_CURRENT = 1;
78 this->state_.LNA_CURRENT = 1;
79 this->state_.LODIV_BUF_CURRENT_TX = 1;
80 this->state_.FSCAL3_LO = 9;
81 this->state_.CHP_CURR_CAL_EN = 2;
82 this->state_.FSCAL3_HI = 2;
83 this->state_.FSCAL2 = 0x0A;
84 this->state_.FSCAL1 = 0x20;
85 this->state_.FSCAL0 = 0x0D;
86 this->state_.RCCTRL1 = 0x41;
87 this->state_.FSTEST = 0x59;
88 this->state_.PTEST = 0x7F;
89 this->state_.AGCTEST = 0x3F;
90 this->state_.TEST2 = 0x88;
91 this->state_.TEST1 = 0x31;
92 this->state_.TEST0_LO = 1;
93 this->state_.VCO_SEL_CAL_EN = 1;
94 this->state_.TEST0_HI = 2;
95
96 // PKTCTRL0
97 this->state_.PKT_FORMAT = 3;
98 this->state_.LENGTH_CONFIG = 2;
99 this->state_.FS_AUTOCAL = 1;
100
101 // CRITICAL: Initialize PA Table to avoid transmitting 0 power (Silence)
102 memset(this->pa_table_, 0, sizeof(this->pa_table_));
103}
104
106
108 this->spi_setup();
109 this->cs_->digital_write(true);
111 this->cs_->digital_write(false);
113 this->cs_->digital_write(true);
115 this->cs_->digital_write(false);
116 delay(5);
117
118 this->strobe_(Command::RES);
119 delay(5);
120
123 this->chip_id_ = encode_uint16(this->state_.PARTNUM, this->state_.VERSION);
124 ESP_LOGD(TAG, "CC1101 found! Chip ID: 0x%04X", this->chip_id_);
125 if (this->state_.VERSION == 0 || this->state_.PARTNUM == 0xFF) {
126 ESP_LOGE(TAG, "Failed to verify CC1101.");
127 this->mark_failed();
128 return;
129 }
130
131 // Setup GDO0 pin if configured
132 if (this->gdo0_pin_ != nullptr) {
133 this->gdo0_pin_->setup();
134 }
135
136 this->initialized_ = true;
137
138 for (uint8_t i = 0; i <= static_cast<uint8_t>(Register::TEST0); i++) {
139 if (i == static_cast<uint8_t>(Register::FSTEST) || i == static_cast<uint8_t>(Register::AGCTEST)) {
140 continue;
141 }
142 this->write_(static_cast<Register>(i));
143 }
145 if (!this->enter_rx_()) {
146 this->mark_failed();
147 return;
148 }
149
150 // Defer pin mode setup until after all components have completed setup()
151 // This handles the case where remote_transmitter runs after CC1101 and changes pin mode
152 if (this->gdo0_pin_ != nullptr) {
153 this->defer([this]() {
155 if (this->state_.PKT_FORMAT == static_cast<uint8_t>(PacketFormat::PACKET_FORMAT_FIFO)) {
157 }
158 });
159 }
160}
161
162void CC1101Component::call_listeners_(const std::vector<uint8_t> &packet, float freq_offset, float rssi, uint8_t lqi) {
163 for (auto &listener : this->listeners_) {
164 listener->on_packet(packet, freq_offset, rssi, lqi);
165 }
166 this->packet_trigger_.trigger(packet, freq_offset, rssi, lqi);
167}
168
170 this->disable_loop();
171 if (this->state_.PKT_FORMAT != static_cast<uint8_t>(PacketFormat::PACKET_FORMAT_FIFO) || this->gdo0_pin_ == nullptr ||
172 !this->gdo0_pin_->digital_read()) {
173 return;
174 }
175
176 // Read state
178 uint8_t rx_bytes = this->state_.NUM_RXBYTES;
179 bool overflow = this->state_.RXFIFO_OVERFLOW;
180 if (overflow || rx_bytes == 0) {
181 ESP_LOGW(TAG, "RX FIFO overflow, flushing");
182 this->enter_idle_();
183 this->strobe_(Command::FRX);
184 this->enter_rx_();
185 return;
186 }
187
188 // Read packet
189 uint8_t payload_length, expected_rx;
190 if (this->state_.LENGTH_CONFIG == static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_VARIABLE)) {
191 this->read_(Register::FIFO, &payload_length, 1);
192 expected_rx = payload_length + 1;
193 } else {
194 payload_length = this->state_.PKTLEN;
195 expected_rx = payload_length;
196 }
197 if (payload_length == 0 || payload_length > 64 || rx_bytes != expected_rx) {
198 ESP_LOGW(TAG, "Invalid packet: rx_bytes %u, payload_length %u", rx_bytes, payload_length);
199 this->enter_idle_();
200 this->strobe_(Command::FRX);
201 this->enter_rx_();
202 return;
203 }
204 this->packet_.resize(payload_length);
205 this->read_(Register::FIFO, this->packet_.data(), payload_length);
206
207 // Read status from registers (more reliable than FIFO status bytes due to timing issues)
209 this->read_(Register::RSSI);
210 this->read_(Register::LQI);
211 float freq_offset = static_cast<int8_t>(this->state_.FREQEST) * (XTAL_FREQUENCY / (1 << 14));
212 float rssi = (this->state_.RSSI * RSSI_STEP) - RSSI_OFFSET;
213 bool crc_ok = (this->state_.LQI & STATUS_CRC_OK_MASK) != 0;
214 uint8_t lqi = this->state_.LQI & STATUS_LQI_MASK;
215 if (this->state_.CRC_EN == 0 || crc_ok) {
216 this->call_listeners_(this->packet_, freq_offset, rssi, lqi);
217 }
218
219 // Return to rx
220 this->enter_idle_();
221 this->strobe_(Command::FRX);
222 this->enter_rx_();
223}
224
226 static const char *const MODULATION_NAMES[] = {"2-FSK", "GFSK", "UNUSED", "ASK/OOK",
227 "4-FSK", "UNUSED", "UNUSED", "MSK"};
228 int32_t freq = static_cast<int32_t>(this->state_.FREQ2 << 16 | this->state_.FREQ1 << 8 | this->state_.FREQ0) *
229 XTAL_FREQUENCY / (1 << 16);
230 float symbol_rate = (((256.0f + this->state_.DRATE_M) * (1 << this->state_.DRATE_E)) / (1 << 28)) * XTAL_FREQUENCY;
231 float bw = XTAL_FREQUENCY / (8.0f * (4 + this->state_.CHANBW_M) * (1 << this->state_.CHANBW_E));
232 ESP_LOGCONFIG(TAG,
233 "CC1101:\n"
234 " Chip ID: 0x%04X\n"
235 " Frequency: %" PRId32 " Hz\n"
236 " Channel: %u\n"
237 " Modulation: %s\n"
238 " Symbol Rate: %.0f baud\n"
239 " Filter Bandwidth: %.1f Hz\n"
240 " Output Power: %.1f dBm",
241 this->chip_id_, freq, this->state_.CHANNR, MODULATION_NAMES[this->state_.MOD_FORMAT & 0x07],
242 symbol_rate, bw, this->output_power_effective_);
243 LOG_PIN(" CS Pin: ", this->cs_);
244}
245
247 // Ensure Packet Format is 3 (Async Serial)
248 this->write_(Register::PKTCTRL0, 0x32);
249 ESP_LOGV(TAG, "Beginning TX sequence");
250 if (this->gdo0_pin_ != nullptr) {
253 }
254 // Transition through IDLE to bypass CCA (Clear Channel Assessment) which can
255 // block TX entry when strobing from RX, and to ensure FS_AUTOCAL calibration
256 this->enter_idle_();
257 if (!this->enter_tx_()) {
258 ESP_LOGW(TAG, "Failed to enter TX state!");
259 }
260}
261
263 ESP_LOGV(TAG, "Beginning RX sequence");
264 if (this->gdo0_pin_ != nullptr) {
266 }
267 // Transition through IDLE to ensure FS_AUTOCAL calibration occurs
268 this->enter_idle_();
269 if (!this->enter_rx_()) {
270 ESP_LOGW(TAG, "Failed to enter RX state!");
271 }
272}
273
275 this->strobe_(Command::RES);
276 this->setup();
277}
278
280 ESP_LOGV(TAG, "Setting IDLE state");
281 this->enter_idle_();
282}
283
284bool CC1101Component::wait_for_state_(State target_state, uint32_t timeout_ms) {
285 uint32_t start = millis();
286 while (millis() - start < timeout_ms) {
288 State s = static_cast<State>(this->state_.MARC_STATE);
289 if (s == target_state) {
290 return true;
291 }
293 }
294 return false;
295}
296
298 // The PLL must be recalibrated until PLL lock is achieved
299 for (uint8_t retries = PLL_LOCK_RETRIES; retries > 0; retries--) {
300 this->strobe_(cmd);
301 if (!this->wait_for_state_(target_state)) {
302 return false;
303 }
304 this->read_(Register::FSCAL1);
305 if (this->state_.FSCAL1 != FSCAL1_PLL_NOT_LOCKED) {
306 return true;
307 }
308 ESP_LOGW(TAG, "PLL lock failed, retrying calibration");
309 this->enter_idle_();
310 }
311 ESP_LOGE(TAG, "PLL lock failed after retries");
312 return false;
313}
314
319
321
323
325 uint8_t index = static_cast<uint8_t>(cmd);
326 if (cmd < Command::RES || cmd > Command::NOP) {
327 return 0xFF;
328 }
329 this->enable();
330 uint8_t status_byte = this->transfer_byte(index);
331 this->disable();
332 return status_byte;
333}
334
336 uint8_t index = static_cast<uint8_t>(reg);
337 this->enable();
338 this->write_byte(index);
339 this->write_array(&this->state_.regs()[index], 1);
340 this->disable();
341}
342
343void CC1101Component::write_(Register reg, uint8_t value) {
344 uint8_t index = static_cast<uint8_t>(reg);
345 this->state_.regs()[index] = value;
346 this->write_(reg);
347}
348
349void CC1101Component::write_(Register reg, const uint8_t *buffer, size_t length) {
350 uint8_t index = static_cast<uint8_t>(reg);
351 this->enable();
352 this->write_byte(index | BUS_WRITE | BUS_BURST);
353 this->write_array(buffer, length);
354 this->disable();
355}
356
358 uint8_t index = static_cast<uint8_t>(reg);
359 this->enable();
360 this->write_byte(index | BUS_READ | BUS_BURST);
361 this->state_.regs()[index] = this->transfer_byte(0);
362 this->disable();
363}
364
365void CC1101Component::read_(Register reg, uint8_t *buffer, size_t length) {
366 uint8_t index = static_cast<uint8_t>(reg);
367 this->enable();
368 this->write_byte(index | BUS_READ | BUS_BURST);
369 this->read_array(buffer, length);
370 this->disable();
371}
372
373CC1101Error CC1101Component::transmit_packet(const std::vector<uint8_t> &packet) {
374 if (this->state_.PKT_FORMAT != static_cast<uint8_t>(PacketFormat::PACKET_FORMAT_FIFO)) {
375 return CC1101Error::PARAMS;
376 }
377
378 // Write packet
379 this->enter_idle_();
380 this->strobe_(Command::FTX);
381 if (this->state_.LENGTH_CONFIG == static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_VARIABLE)) {
382 this->write_(Register::FIFO, static_cast<uint8_t>(packet.size()));
383 }
384 this->write_(Register::FIFO, packet.data(), packet.size());
385
386 // Calibrate PLL
388 ESP_LOGW(TAG, "PLL lock failed during TX");
389 this->enter_idle_();
390 this->enter_rx_();
392 }
393
394 // Transmit packet
395 this->strobe_(Command::TX);
396 if (!this->wait_for_state_(State::IDLE, 1000)) {
397 ESP_LOGW(TAG, "TX timeout");
398 this->enter_idle_();
399 this->enter_rx_();
401 }
402
403 // Return to rx
404 this->enter_rx_();
405 return CC1101Error::NONE;
406}
407
408// Setters
410 this->output_power_requested_ = value;
411 int32_t freq = static_cast<int32_t>(this->state_.FREQ2 << 16 | this->state_.FREQ1 << 8 | this->state_.FREQ0) *
412 XTAL_FREQUENCY / (1 << 16);
413 uint8_t a = 0xC0;
414 if (freq >= 300000000 && freq <= 348000000) {
415 a = PowerTableItem::find(PA_TABLE_315, sizeof(PA_TABLE_315) / sizeof(PA_TABLE_315[0]), value);
416 } else if (freq >= 378000000 && freq <= 464000000) {
417 a = PowerTableItem::find(PA_TABLE_433, sizeof(PA_TABLE_433) / sizeof(PA_TABLE_433[0]), value);
418 } else if (freq >= 779000000 && freq < 900000000) {
419 a = PowerTableItem::find(PA_TABLE_868, sizeof(PA_TABLE_868) / sizeof(PA_TABLE_868[0]), value);
420 } else if (freq >= 900000000 && freq <= 928000000) {
421 a = PowerTableItem::find(PA_TABLE_915, sizeof(PA_TABLE_915) / sizeof(PA_TABLE_915[0]), value);
422 }
423
424 if (static_cast<Modulation>(this->state_.MOD_FORMAT) == Modulation::MODULATION_ASK_OOK) {
425 this->pa_table_[0] = 0;
426 this->pa_table_[1] = a;
427 } else {
428 this->pa_table_[0] = a;
429 this->pa_table_[1] = 0;
430 }
431 this->output_power_effective_ = value;
432 if (this->initialized_) {
433 this->write_(Register::PATABLE, this->pa_table_, sizeof(this->pa_table_));
434 }
435}
436
438 this->state_.CLOSE_IN_RX = static_cast<uint8_t>(value);
439 if (this->initialized_) {
441 }
442}
443
445 this->state_.DEM_DCFILT_OFF = value ? 0 : 1;
446 if (this->initialized_) {
448 }
449}
450
452 int32_t freq = static_cast<int32_t>(value * (1 << 16) / XTAL_FREQUENCY);
453 this->state_.FREQ2 = static_cast<uint8_t>(freq >> 16);
454 this->state_.FREQ1 = static_cast<uint8_t>(freq >> 8);
455 this->state_.FREQ0 = static_cast<uint8_t>(freq);
456 if (this->initialized_) {
457 this->enter_idle_();
458 this->write_(Register::FREQ2);
459 this->write_(Register::FREQ1);
460 this->write_(Register::FREQ0);
461 this->enter_rx_();
462 }
463}
464
466 this->state_.FREQ_IF = value * (1 << 10) / XTAL_FREQUENCY;
467 if (this->initialized_) {
469 }
470}
471
473 uint8_t e;
474 uint32_t m;
475 split_float(XTAL_FREQUENCY / (value * 8), 2, e, m);
476 this->state_.CHANBW_E = e;
477 this->state_.CHANBW_M = static_cast<uint8_t>(m);
478 if (this->initialized_) {
480 }
481}
482
483void CC1101Component::set_channel(uint8_t value) {
484 this->state_.CHANNR = value;
485 if (this->initialized_) {
486 this->enter_idle_();
488 this->enter_rx_();
489 }
490}
491
493 uint8_t e;
494 uint32_t m;
495 split_float(value * (1 << 18) / XTAL_FREQUENCY, 8, e, m);
496 this->state_.CHANSPC_E = e;
497 this->state_.CHANSPC_M = static_cast<uint8_t>(m);
498 if (this->initialized_) {
501 }
502}
503
505 uint8_t e;
506 uint32_t m;
507 split_float(value * (1 << 17) / XTAL_FREQUENCY, 3, e, m);
508 this->state_.DEVIATION_E = e;
509 this->state_.DEVIATION_M = static_cast<uint8_t>(m);
510 if (this->initialized_) {
512 }
513}
514
516 this->state_.DEVIATION_E = 0;
517 this->state_.DEVIATION_M = value - 1;
518 if (this->initialized_) {
520 }
521}
522
524 uint8_t e;
525 uint32_t m;
526 split_float(value * (1 << 28) / XTAL_FREQUENCY, 8, e, m);
527 this->state_.DRATE_E = e;
528 this->state_.DRATE_M = static_cast<uint8_t>(m);
529 if (this->initialized_) {
532 }
533}
534
536 this->state_.SYNC_MODE = static_cast<uint8_t>(value);
537 if (this->initialized_) {
539 }
540}
541
543 this->state_.CARRIER_SENSE_ABOVE_THRESHOLD = value ? 1 : 0;
544 if (this->initialized_) {
546 }
547}
548
550 this->state_.MOD_FORMAT = static_cast<uint8_t>(value);
551 this->state_.PA_POWER = value == Modulation::MODULATION_ASK_OOK ? 1 : 0;
552 if (this->initialized_) {
553 this->enter_idle_();
557 this->enter_rx_();
558 }
559}
560
562 this->state_.MANCHESTER_EN = value ? 1 : 0;
563 if (this->initialized_) {
565 }
566}
567
569 this->state_.NUM_PREAMBLE = value;
570 if (this->initialized_) {
572 }
573}
574
575void CC1101Component::set_sync1(uint8_t value) {
576 this->state_.SYNC1 = value;
577 if (this->initialized_) {
578 this->write_(Register::SYNC1);
579 }
580}
581
582void CC1101Component::set_sync0(uint8_t value) {
583 this->state_.SYNC0 = value;
584 if (this->initialized_) {
585 this->write_(Register::SYNC0);
586 }
587}
588
590 this->state_.MAGN_TARGET = static_cast<uint8_t>(value);
591 if (this->initialized_) {
593 }
594}
595
597 this->state_.MAX_LNA_GAIN = static_cast<uint8_t>(value);
598 if (this->initialized_) {
600 }
601}
602
604 this->state_.MAX_DVGA_GAIN = static_cast<uint8_t>(value);
605 if (this->initialized_) {
607 }
608}
609
611 this->state_.CARRIER_SENSE_ABS_THR = static_cast<uint8_t>(value & 0b1111);
612 if (this->initialized_) {
614 }
615}
616
618 this->state_.CARRIER_SENSE_REL_THR = static_cast<uint8_t>(value);
619 if (this->initialized_) {
621 }
622}
623
625 this->state_.AGC_LNA_PRIORITY = value ? 1 : 0;
626 if (this->initialized_) {
628 }
629}
630
632 this->state_.FILTER_LENGTH = static_cast<uint8_t>(value);
633 if (this->initialized_) {
635 }
636}
637
639 this->state_.FILTER_LENGTH = static_cast<uint8_t>(value);
640 if (this->initialized_) {
642 }
643}
644
646 this->state_.AGC_FREEZE = static_cast<uint8_t>(value);
647 if (this->initialized_) {
649 }
650}
651
653 this->state_.WAIT_TIME = static_cast<uint8_t>(value);
654 if (this->initialized_) {
656 }
657}
658
660 this->state_.HYST_LEVEL = static_cast<uint8_t>(value);
661 if (this->initialized_) {
663 }
664}
665
667 this->state_.PKT_FORMAT =
669 if (value) {
670 // Configure GDO0 for FIFO status (asserts on RX FIFO threshold or end of packet)
671 this->state_.GDO0_CFG = 0x01;
672 // Set max RX FIFO threshold to ensure we only trigger on end-of-packet
673 this->state_.FIFO_THR = 15;
674 // Don't append status bytes to FIFO - we read from registers instead
675 this->state_.APPEND_STATUS = 0;
676 } else {
677 // Configure GDO0 for serial data (async serial mode)
678 this->state_.GDO0_CFG = 0x0D;
679 }
680 if (this->initialized_) {
681 if (this->gdo0_pin_ != nullptr) {
682 if (value) {
684 } else {
686 }
687 }
692 }
693}
694
696 if (value == 0) {
697 this->state_.LENGTH_CONFIG = static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_VARIABLE);
698 } else {
699 this->state_.LENGTH_CONFIG = static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_FIXED);
700 this->state_.PKTLEN = value;
701 }
702 if (this->initialized_) {
705 }
706}
707
709 this->state_.CRC_EN = value ? 1 : 0;
710 if (this->initialized_) {
712 }
713}
714
716 this->state_.WHITE_DATA = value ? 1 : 0;
717 if (this->initialized_) {
719 }
720}
721
722} // namespace esphome::cc1101
uint8_t m
Definition bl0906.h:1
void mark_failed()
Mark this component as failed.
ESPDEPRECATED("Use const char* overload instead. Removed in 2026.7.0", "2026.1.0") void defer(const std voi defer)(const char *name, std::function< void()> &&f)
Defer a callback to the next loop() call.
Definition component.h:560
void enable_loop_soon_any_context()
Thread and ISR-safe version of enable_loop() that can be called from any context.
void disable_loop()
Disable this component's loop.
virtual void pin_mode(gpio::Flags flags)=0
virtual void setup()=0
virtual void digital_write(bool value)=0
virtual void detach_interrupt() const =0
void attach_interrupt(void(*func)(T *), T *arg, gpio::InterruptType type) const
Definition gpio.h:107
void trigger(const Ts &...x) ESPHOME_ALWAYS_INLINE
Inform the parent automation that the event has triggered.
Definition automation.h:482
void set_packet_mode(bool value)
Definition cc1101.cpp:666
void set_max_dvga_gain(MaxDvgaGain value)
Definition cc1101.cpp:603
void set_whitening(bool value)
Definition cc1101.cpp:715
void set_carrier_sense_above_threshold(bool value)
Definition cc1101.cpp:542
void write_(Register reg)
Definition cc1101.cpp:335
void set_sync0(uint8_t value)
Definition cc1101.cpp:582
void set_freeze(Freeze value)
Definition cc1101.cpp:645
void call_listeners_(const std::vector< uint8_t > &packet, float freq_offset, float rssi, uint8_t lqi)
Definition cc1101.cpp:162
void set_rx_attenuation(RxAttenuation value)
Definition cc1101.cpp:437
InternalGPIOPin * gdo0_pin_
Definition cc1101.h:95
void set_symbol_rate(float value)
Definition cc1101.cpp:523
uint8_t strobe_(Command cmd)
Definition cc1101.cpp:324
void set_sync_mode(SyncMode value)
Definition cc1101.cpp:535
void set_fsk_deviation(float value)
Definition cc1101.cpp:504
void set_msk_deviation(uint8_t value)
Definition cc1101.cpp:515
void set_carrier_sense_rel_thr(CarrierSenseRelThr value)
Definition cc1101.cpp:617
uint8_t pa_table_[PA_TABLE_SIZE]
Definition cc1101.h:90
void set_lna_priority(bool value)
Definition cc1101.cpp:624
void set_output_power(float value)
Definition cc1101.cpp:409
void set_modulation_type(Modulation value)
Definition cc1101.cpp:549
void set_if_frequency(float value)
Definition cc1101.cpp:465
void set_frequency(float value)
Definition cc1101.cpp:451
void set_num_preamble(uint8_t value)
Definition cc1101.cpp:568
void set_hyst_level(HystLevel value)
Definition cc1101.cpp:659
void set_filter_bandwidth(float value)
Definition cc1101.cpp:472
void set_filter_length_fsk_msk(FilterLengthFskMsk value)
Definition cc1101.cpp:631
void set_crc_enable(bool value)
Definition cc1101.cpp:708
static void IRAM_ATTR gpio_intr(CC1101Component *arg)
Definition cc1101.cpp:105
void set_carrier_sense_abs_thr(int8_t value)
Definition cc1101.cpp:610
bool enter_calibrated_(State target_state, Command cmd)
Definition cc1101.cpp:297
void set_magn_target(MagnTarget value)
Definition cc1101.cpp:589
void set_channel_spacing(float value)
Definition cc1101.cpp:492
CC1101Error transmit_packet(const std::vector< uint8_t > &packet)
Definition cc1101.cpp:373
void set_wait_time(WaitTime value)
Definition cc1101.cpp:652
std::vector< CC1101Listener * > listeners_
Definition cc1101.h:102
void set_dc_blocking_filter(bool value)
Definition cc1101.cpp:444
void set_packet_length(uint8_t value)
Definition cc1101.cpp:695
void set_manchester(bool value)
Definition cc1101.cpp:561
std::vector< uint8_t > packet_
Definition cc1101.h:101
void set_channel(uint8_t value)
Definition cc1101.cpp:483
void set_filter_length_ask_ook(FilterLengthAskOok value)
Definition cc1101.cpp:638
void set_max_lna_gain(MaxLnaGain value)
Definition cc1101.cpp:596
void set_sync1(uint8_t value)
Definition cc1101.cpp:575
bool wait_for_state_(State target_state, uint32_t timeout_ms=100)
Definition cc1101.cpp:284
Trigger< std::vector< uint8_t >, float, float, uint8_t > packet_trigger_
Definition cc1101.h:100
@ INTERRUPT_RISING_EDGE
Definition gpio.h:50
@ FLAG_OUTPUT
Definition gpio.h:28
@ FLAG_INPUT
Definition gpio.h:27
void IRAM_ATTR HOT delayMicroseconds(uint32_t us)
Definition core.cpp:30
constexpr uint16_t encode_uint16(uint8_t msb, uint8_t lsb)
Encode a 16-bit value given the most and least significant byte.
Definition helpers.h:881
void HOT delay(uint32_t ms)
Definition core.cpp:28
uint32_t IRAM_ATTR HOT millis()
Definition core.cpp:26
static void uint32_t
static uint8_t find(const PowerTableItem *items, size_t count, float &dbm_target)
Definition cc1101pa.h:15
uint16_t length
Definition tt21100.cpp:0